Conferencia: "Statistical Variability in Nanometer scale CMOS Devices"

Fecha: Miércoles, 15 de Enero de 2014
Lugar: Sala de Conferencias del CITIC-UGR.
Horario: 12:00 h.
Descripción:
Conferenciante: Prof. Asen Asenov. Gold Standard Simulation Ltd. and University of Glasgow (U.K.)
- Abstract: Statistical variability and reliability introduced by Random Discrete Dopants (RDD), Line Edge Roughness (LER), Metal Gate Granularity (MGG), and random Interface Trapped Charge (ITC) in bulk MOSFETs is one of the major roadblocks to device scaling and integration. It is expected that at 22nm it will have a detrimental impact on both SRAM area and supply voltage scaling making the design of properly scaled low leakage SRAM virtually impossible. Transistor architectures that tolerate low channel doping can substantially reduce statistical variability, putting SRAM area and supply voltage scaling back on track. Unsurprisingly, in May 2011 Intel announced the introduction of FinFETs (TriGate transistors) for their 22 nm technology generation. For the first time, there is an essential branching in the semiconductor industry with both bulk MOSFET, FinFET and FD SOI based CMOS coexisting and competing at the 22nm technology generation. There is also the distinct possibility that modifications to the conventional bulk MOSFET, which utilise low-doped epitaxial channels, will also enter the competition. In such a situation it is essential to be able to compare the performance and variability of the main competing technologies – conventional and epitaxial bulk MOSFETs, FinFETs and FD- SOI MOSFETs- for at least three technology generations. Such a comparison is of great importance for two reasons: (i) It will help technology providers (IDMs and foundries) make the correct technology choices that provide a solution to the critical problems associated with variability, for not one, but two or more technology generations. (ii) With more than one technology option available from different providers, fabless companies must be able to make the right technology choices that meet the specific requirements of their products.
- Biography: Asen Asenov (FIEEE, FRSE) received his MSc degree in solid state physics from Sofia University, Bulgaria in 1979 and the PhD degree in physics from The Bulgarian Academy of Science in 1989. He has ten years of industrial experience as a head of the Process and Device Modelling Group in Institute of Microelectronics, Sofia, developing one of the first integrated process and device CMOS simulators IMPEDANCE. In 1989–1991 he was a Visiting Professor at the Physics Department of Technical University of Munich, Germany. He joined the Department of Electronics and Electrical Engineering at the University of Glasgow in 1991, and served as a Head of Department in 1999-2003. As a James Watt Professor in Electrical Engineering and a Leader of the Glasgow Device Modelling Group Asenov directs the development of 2D and 3D quantum mechanical, Monte Carlo and classical device simulators and their application in the design of advanced and novel CMOS devices. He has pioneered the simulations of statistical variability in nano-CMOS devices including random dopants, interface roughness and line edge roughness. He has over 550 publications and more than 160 invited talks in the above areas. Professor Asenov is a fellow of the Royal Academy of Scotland, an IEEE Fellow and a member of the IEEE Electron Device Society Technology Computer-Aided Design Committee and of the BP Fellowship Committee. He is a co-author of European Nanoelectronics Advisory Council (ENIAC) Strategic Research Agenda (SRA) and acted on behave of EC as and reviewer for more than 15 EC projects and as an evaluator of several FP5, FP6 and FP7 calls. He has been a general chair, co-chair and TPC chair for many international conferences.
Organiza: Grupo de investigación en Nanoelectrónica de la Universidad de Granada, dentro del programa (SSV-GENIL)
Más información: http://citic.ugr.es

Conferencia: «Statistical Variability in Nanometer scale CMOS Devices»

15 enero 2014 | 11:00 - 12:00 h

Actividades culturales y de divulgación
Conferencias, seminarios, divulgación científica

Fechas y horarios

Conferencia: «Statistical Variability in Nanometer scale CMOS Devices»

15 enero 2014 | 11:00 - 12:00 h

Actividades culturales y de divulgaciónConferencias, seminarios, divulgación científica

Fechas y horarios

Actividades culturales y de divulgación
Conferencias, seminarios, divulgación científica